Computer Science
Scientific paper
Jan 2001
adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2001iaop.work...43j&link_type=abstract
Forum on Innovative Approaches to Outer Planetary Exploration 2001-2020, p. 43
Computer Science
Spacecraft Electronic Equipment, Chips (Electronics), Substrates, Integrated Circuits, Soi (Semiconductors), Computerized Simulation, Cmos
Scientific paper
The current trend for space application systems is towards fully integrated systems-on-a-chip. To facilitate this drive, high-voltage transistors must reside on the same substrate as low-voltage transistors. These systems must also be radiation tolerant, particularly for space missions such as the Europa Lander and Titan Explorer. SOI CMOS technology offers high levels of radiation hardness. As a result, a high-voltage lateral MOSFET has been developed in a partially-depleted (PD) SOI technology. Utilizing high voltages causes a parasitic transistor to have non-negligible effects on a circuit. Several circuit architectures have been used to compensate for the radiation induced threshold voltage shift of the parasitic back-channel transistor. However, a new architecture for high-voltage systems must be employed to bias the substrate to voltage levels insuring all parasitic transistors remain off. An active substrate driver has been developed to accomplish task. Additional information is contained in the original extended abstract.
Blalock B. J.
Jackson Suzy A.
Li Hong-Wei
Mojarradi Mohammad
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