4x288 linear array with hybrid ROIC (CCD + CMOS)

Details 4x288 linear array with hybrid ROIC (CCD + CMOS) 4x288 linear array with hybrid ROIC (CCD + CMOS)

Apr 2005

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2005spie.5726..132s&link_type=abstract

Semiconductor Photodetectors II. Edited by Cohen, Marshall J.; Dereniak, Eustace L. Proceedings of the SPIE, Volume 5726, pp

Computer Science

Scientific paper

4×288 MCT LWIR linear arrays with 28X25 μm diodes and silicon ROICs were designed, manufactured and tested. MCT layers were grown by MBE technology on (013) GaAs substrates with CdTe/ZnTe buffer layers and λco = 11.2+/-0.15 μm at T = 78 K. CCD and CMOS "hybrid" technology for design and manufacture of silicon ROICs was used. The design rules 2.5 μm for CCD technology and 2.0 μm design rules for CMOS technology happened to be sufficient to realize most of the functions for 288×4 MCT TDI array. Analog functions were realized by CCD elements. An amplification of the output signals is realized by CMOS buffer amplifier. Decoding and deselection code storing functions are accomplished by digital CMOS elements. 288 information channels were attached to 4 analog outputs operating in the frequency range f≤4 MHz clock. Total consumption power measured is 50 mW at T = 298 K and 70 mW at T = 78 K. Before hybridization the parameters of MCT linear arrays and Si readouts were tested separately. With aperture 280×640 the detectivities Dλ ≈ 1.8.1011 cm.Hz1/2/W were achieved (λco ≈ 11.2 μm, λmax 10.0 μm) with standard deviation about 15 % and operability close to 100 %.

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