1K X 1K Si:As IBC detector arrays for JWST MIRI and other applications

Details 1K X 1K Si:As IBC detector arrays for JWST MIRI and other applications 1K X 1K Si:As IBC detector arrays for JWST MIRI and other applications

Sep 2004

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2004spie.5499...86l&link_type=abstract

Optical and Infrared Detectors for Astronomy. Edited by James D. Garnett and James W. Beletic. Proceedings of the SPIE, Volume 5

Astronomy and Astrophysics

Astronomy

3

Scientific paper

1K × 1K Si:As Impurity Band Conduction (IBC) arrays have been developed by Raytheon Vision Systems (RVS) for the James Webb Space Telescope (JWST) Mid-Infrared Instrument (MIRI). The devices are also suitable for other low-background applications. The Si:As IBC detectors respond out to ~28 microns, covering an important mid-IR region beyond the 1-5 micron range covered by the JWST NIRCam and NIRSpec instruments. Due to high terrestrial backgrounds at the longer mid-IR wavelengths, it is very difficult to conduct ground-based observations at these wavelengths. Hence, the MIRI instrument on JWST can provide science not obtainable from the ground. A mid-infrared instrument aboard a cryogenic space telescope can have an enormous impact in resolving key questions in astronomy and cosmology. The greatly reduced thermal backgrounds achievable on a space platform (compared to airborne or ground-based platforms) allow for more sensitive observations of dusty young galaxies at high redshifts, star formation of solar-type stars in the local universe, and formation and evolution of planetary disks and systems. We describe results of the development of a new 1024 × 1024 Si:As IBC array with 25-micron pixels that responds with high quantum efficiency over the wavelength range 5 to 28 microns. The previous generation's largest, most sensitive IR detectors at these wavelengths were the 256 × 256/30-micron pitch Si:As IBC devices built by Raytheon for the SIRTF/IRAC instrument. JWST MIRI detector requirements will be reviewed and some model results for IBC device performance will be presented. The IBC detector architecture will be described and the SB305 Readout Integrated Circuit (ROIC), developed specifically for JWST MIRI, will be discussed. The SB305 ROIC utilizes a PMOS Source Follower per Detector (SFD) input circuit with a well capacity of about 2 × 105 electrons. The read noise is expected to be less than 20 e- rms with Fowler-8 sampling at an operating temperature of 7 K. Other features of the IBC array include 4 video outputs and a separate reference output with a frame rate of 0.37 Hz (2.7 sec frame time). Power dissipation is less than 0.5 mW at a 0.37 Hz frame rate. Reset modes include both global reset and reset by row (ripple mode). Reference pixels are built-in to the output data stream. The 1K × 1K IBC is packaged in a robust modular package that consists of a multilayer motherboard, silicon carbide (SiC) pedestal, and cable assembly with 51-pin MDM connectors. All materials of construction were chosen to match the thermal expansion coefficient of silicon to provide excellent module thermal cycle reliability for cycling between room temperature and 7 K.

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