Silicon JFETs for cryogenic applications

Details Silicon JFETs for cryogenic applications Silicon JFETs for cryogenic applications

Apr 1998

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1998spie.3287..146d&link_type=abstract

Proc. SPIE Vol. 3287, p. 146-149, Photodetectors: Materials and Devices III, Gail J. Brown; Ed.

Computer Science

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Scientific paper

A process for fabrication of low-frequency, low-noise, low- power silicon JFETs for cryogenic operation has been developed. COmmercially available silicon JFETs exhibit very high low frequency and 1/f noise at liquid nitrogen temperature. We report on process optimization and effect of high temperature oxidation and drive-in process on noise performance of these devices. These silicon JFETs were designed for operation at 77K. In this paper, we report the noise performance and its relation to the well-known complex oxygen-vacancy. A center that has a trap level of 0.18 eV below the conduction band. These devices were developed for use in the photo-diode assembly of NASAs Gravity Probe B mission telescope.

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