Pile-of-PC (PoPC) signature predictions in support of HWIL simulation

Details Pile-of-PC (PoPC) signature predictions in support of HWIL simulation Pile-of-PC (PoPC) signature predictions in support of HWIL simulation

Jul 2000

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2000spie.4027..312m&link_type=abstract

Proc. SPIE Vol. 4027, p. 312-322, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing V, Robert Lee Murrer; Ed

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Signature predictions for full-scale vehicles at Ka-band frequencies can require weeks or months of CPU time for completion; consequently, high performance computers are required in order for prediction codes to be useful in simulation support. Recent advances in Commodity-off-the-Shelf (COTS) personal computer (PC) hardware along with open-source operating systems such as Linux allow for a cost-effective solution to computational requirements routinely encountered in signature analysis and synthetic data generation in support of hardware-in-the-loop (HWIL) simulation. This paper presents the development and evaluation of a Pile-of-PC (PoPC) cluster in support of full-scale, high-frequency signature predictions.

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