Evaluation of Cryogenic Readout Circuits with GaAs JFETs for Far-Infrared Detectors

Computer Science – Performance

Scientific paper

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Gaas Jfet, Cryogenic, Readout Circuit, Infrared Sensor, 1/F-Noise

Scientific paper

The characteristics of gallium arsenide junction field-effect transistors (GaAs JFETs) and the performance of cryogenic readout circuits using GaAs JFETs for two-dimensional far-infrared arrays are evaluated at cryogenic temperature. We fabricated the GaAs JFETs with various gate sizes ranging from W/L = 5 micron/0.5 micron to 200 micron/200 micron to systematically measure their static characteristics and low-frequency noise spectra. We found that the low-frequency noise voltage depends on the device size in the saturation region of GaAs JFETs at 4.2 K, and the power density of the noise voltage is inversely proportional to the gate area. These findings allowed us to determine the Hooge parameter of the GaAs JFET at 4.2 K to be 4 x 10-5, assuming that the carrier mobility is 1.5 x 103 cm2/Vs. On the other hand, we did not find the obvious correlation between the low-frequency noise and gate size in the ohmic region of GaAs JFETs. Based on these measurements for GaAs JFETs, we fabricated and tested a dual GaAs JFET, a~source-follower-per-detector (SFD) circuit, and a 20 x 3 channel SFD circuit array. The Common-Mode-Rejection-Ratio (CMRR) of the dual GaAs JFET with W/L = 50 micron/20 micron at 4.2 K was determined to be 40-60 dB under small power dissipation. The performance of SFD circuits and the 20x3 channel SFD arrays for two-dimensional far-infrared Ge:Ga detector readouts are currently being evaluated.

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