4. Computer Science
  5. Hardware Architecture

Trevor Mudge

Computer Science – Hardware Architecture

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DVS for On-Chip Bus Designs Based on Timing Error Correction

Computer Science – Hardware Architecture
Scientific paper

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Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage

Computer Science – Hardware Architecture
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Profile ID: LFWR-SCP-P-326440

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