Computer Science – Hardware Architecture
Scientist
Computer Science
Hardware Architecture
Scientist
Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips
Rapid Generation of Thermal-Safe Test Schedules
Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores
Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration
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