Computer Science – Hardware Architecture
Scientist
Computer Science
Hardware Architecture
Scientist
A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware
A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck
Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives
Functional Equivalence Checking for Verification of Algebraic Transformations on Array-Intensive Source Code
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